学術雑誌論文

学術雑誌論文

text

Microelectronics Journal. 2015, 46(1), p. 27-35

RF front-end architecture for a triple-band CMOS GPS receiver

Elsevier

英語

text

2015-01

https://doi.org/10.1016/j.mejo.2014.10.001

This paper describes a triple-band global positioning system (GPS) receiver that simultaneously covers the L1, L2, and L5 frequency bands. The proposed receiver uses an image-rejection technique that can separate signals from the three frequency bands to three corresponding ports. It uses a single RF path containing a low-noise amplifier (LNA), and active and passive mixers with a pair of local oscillator signals. A triple-band GPS RF front-end chip was fabricated using 130 nm CMOS technology. The noise figure of this chip is less than 7 dB and its S11 coefficient is less than −10−10 dB in the 1.15-1.6 GHz frequency range. The power consumption of the LNA and mixers is 7.2 mW when using a 1.2 V supply voltage. The image-rejection ratio (IMRR) between L1 and the other (L2 and L5) band signals is 40 dB, while that between the L2 and L5 signals is 37–38 dB. To improve the IMRR between the L2 and L5 signals, we investigated the utilization of a digital compensation technique. This technique was confirmed to have improved the IMRR by about 12 dB.

© 2014 The Authors. Published by Elsevier Ltd. This article is licensed under a Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported License.

51675

RF front-end architecture for a triple-band CMOS GPS receiver

Elsevier

英語

2015-01

Microelectronics Journal

46

1

27

35

https://doi.org/10.1016/j.mejo.2014.10.001

https://hdl.handle.net/11094/51675