A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION

Wang, Jun; Yasue, Kazuhiro; Matsuoka, Toshimasa et al.

Far East Journal of Electronics and Communications, 2010, 5(1), 59-65

アクセス数:365件（2025-08-14 21:25 集計）

固定URL: https://hdl.handle.net/11094/51736

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タイトル	A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION
著者	NRID 1000030543532 1000030543532 著者名 Wang, Jun
	著者名 Yasue, Kazuhiro
	NRID 1000080324820 1000080324820 ORCID 0000-0003-3876-2679 0000-0003-3876-2679 researchmap permalink read0068628 read0068628 Scopus Author ID 7402741552 7402741552 著者名 Matsuoka, Toshimasa
	NRID 1000020192180 1000020192180 著者名 Taniguchi, Kenji
キーワード等	digital circuit
	subthreshold region
	characteristics compensation
抄録	A performance characteristics compensation method that exhibits good resistance to process and temperature variations is proposed for ultra-low-voltage CMOS digital circuits. The experimental results show that the stability of the designed digital circuit is significantly improved even when operating in the subthreshold region under a 0.3-0.5V supply voltage.
出版者	Pushpa Publishing House
収録物名	Far East Journal of Electronics and Communications
巻(号)	5(1)
ページ	59-65
刊行年月	2010
言語	英語
ハンドルURL	https://hdl.handle.net/11094/51736
PISSN	09737006
アクセス権	open access
権利情報	© 2010 Pushpa Publishing House
出版タイプ	Version of Record
カテゴリ	学術雑誌論文 Journal Article

資源タイプ	学術雑誌論文
ローカル資源タイプ	学術雑誌論文
DCMI資源タイプ	text
DCTERMS.bibliographicCitation	Far East Journal of Electronics and Communications. 2010, 5(1), p. 59-65
DC.title	A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION
DC.creator	Wang, Jun
	Yasue, Kazuhiro
	Matsuoka, Toshimasa
	Taniguchi, Kenji
DC.publisher	Pushpa Publishing House
DC.language' scheme='DCTERMS.RFC1766	英語
DC.type' scheme='DCTERMS.DCMIType	text
DCTERMS.issued' scheme='DCTERMS.W3CDTF	2010
DC.subject	digital circuit
	subthreshold region
	characteristics compensation
DCTERMS.abstract	A performance characteristics compensation method that exhibits good resistance to process and temperature variations is proposed for ultra-low-voltage CMOS digital circuits. The experimental results show that the stability of the designed digital circuit is significantly improved even when operating in the subthreshold region under a 0.3-0.5V supply voltage.
DC.rights	© 2010 Pushpa Publishing House
DC.format	51736
citation_title	A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION
citation_author	Wang, Jun
	Yasue, Kazuhiro
	Matsuoka, Toshimasa
	Taniguchi, Kenji
citation_publisher	Pushpa Publishing House
citation_language	英語
citation_date	2010
citation_journal_title	Far East Journal of Electronics and Communications
citation_volume	5
citation_issue	1
citation_firstpage	59
citation_lastpage	65
citation_public_url	https://hdl.handle.net/11094/51736