A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing

Bae, Jungnam; Radhapuram, Saichandrateja; Jo, Ikkyun; Kihara, Takao; Matsuoka, Toshimasa

doi:https://doi.org/10.4236/cs.2015.65014

A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing

Bae, Jungnam; Radhapuram, Saichandrateja; Jo, Ikkyun et al.

Circuits and Systems, 2015, 6(5), 136-142

アクセス数:689件（2025-08-14 21:16 集計）

固定URL: https://hdl.handle.net/11094/51763

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タイトル	A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing
著者	著者名 Bae, Jungnam
	著者名 Radhapuram, Saichandrateja
	著者名 Jo, Ikkyun
	著者名 Kihara, Takao
	NRID 1000080324820 1000080324820 ORCID 0000-0003-3876-2679 0000-0003-3876-2679 researchmap permalink read0068628 read0068628 Scopus Author ID 7402741552 7402741552 著者名 Matsuoka, Toshimasa
キーワード等	VCO
	Resistive Biasing
	Current Source
	CMOS Integrated Circuit
	Phase Noise
	MICS Band
抄録	This paper presents a low-phase-noise LC voltage-controlled oscillator (LC-VCO) with top resistive biasing in subthreshold region. The subthreshold LC-VCO has low-power and low-phase-noise due to its high transconductance efficiency and low gate bias condition. The top resistive biasing has more benefit with the feature of phase noise than MOS current source since it can support the low-noise characteristics and large output swing. The LC-VCO designed in 130-nm CMOS process with 0.7-V supply voltage achieves phase noise of -116 dBc/Hz at 200 kHz offset with tuning range of 398 MHz to 408 MHz covering medical implant communication service (MICS) band.
出版者	Scientific Research Publishing
収録物名	Circuits and Systems
巻(号)	6(5)
ページ	136-142
刊行年月	2015-05-22
言語	英語
ハンドルURL	https://hdl.handle.net/11094/51763
PISSN	21531285
eISSN	21531293
関連情報 (isIdenticalTo)	DOI (出版社版) https://doi.org/10.4236/cs.2015.65014
アクセス権	open access
権利情報	© 2015 by authors and Scientific Research Publishing Inc. This article is licensed under a Creative Commons Attribution 4.0 International License.
出版タイプ	Version of Record
カテゴリ	学術雑誌論文 Journal Article

資源タイプ	学術雑誌論文
ローカル資源タイプ	学術雑誌論文
DCMI資源タイプ	text
DCTERMS.bibliographicCitation	Circuits and Systems. 2015, 6(5), p. 136-142
DC.title	A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing
DC.creator	Bae, Jungnam
	Radhapuram, Saichandrateja
	Jo, Ikkyun
	Kihara, Takao
	Matsuoka, Toshimasa
DC.publisher	Scientific Research Publishing
DC.language' scheme='DCTERMS.RFC1766	英語
DC.type' scheme='DCTERMS.DCMIType	text
DCTERMS.issued' scheme='DCTERMS.W3CDTF	2015-05-22
DC.identifier	https://doi.org/10.4236/cs.2015.65014
DC.subject	VCO
	Resistive Biasing
	Current Source
	CMOS Integrated Circuit
	Phase Noise
	MICS Band
DCTERMS.abstract	This paper presents a low-phase-noise LC voltage-controlled oscillator (LC-VCO) with top resistive biasing in subthreshold region. The subthreshold LC-VCO has low-power and low-phase-noise due to its high transconductance efficiency and low gate bias condition. The top resistive biasing has more benefit with the feature of phase noise than MOS current source since it can support the low-noise characteristics and large output swing. The LC-VCO designed in 130-nm CMOS process with 0.7-V supply voltage achieves phase noise of -116 dBc/Hz at 200 kHz offset with tuning range of 398 MHz to 408 MHz covering medical implant communication service (MICS) band.
DC.rights	© 2015 by authors and Scientific Research Publishing Inc. This article is licensed under a Creative Commons Attribution 4.0 International License.
DC.format	51763
citation_title	A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing
citation_author	Bae, Jungnam
	Radhapuram, Saichandrateja
	Jo, Ikkyun
	Kihara, Takao
	Matsuoka, Toshimasa
citation_publisher	Scientific Research Publishing
citation_language	英語
citation_date	2015-05-22
citation_journal_title	Circuits and Systems
citation_volume	6
citation_issue	5
citation_firstpage	136
citation_lastpage	142
citation_doi	https://doi.org/10.4236/cs.2015.65014
citation_public_url	https://hdl.handle.net/11094/51763

A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing

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