Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC

Hirai, Takeshi; Oda, Rei; Wakamiya, Naoki

doi:https://doi.org/10.1109/JIOT.2024.3400996

Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC

Hirai, Takeshi; Oda, Rei; Wakamiya, Naoki

IEEE Internet of Things Journal, 2024, 11(17), 28227-28243

アクセス数:279件（2025-07-07 18:54 集計）

固定URL: https://hdl.handle.net/11094/97223

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タイトル	Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC
著者	NRID 1000030903554 1000030903554 ORCID 0000-0002-1090-4770 0000-0002-1090-4770 researchmap permalink takeshihirai takeshihirai Scopus Author ID 57203993597 57203993597 著者名 Hirai, Takeshi
	著者名 Oda, Rei
	NRID 1000050283742 1000050283742 researchmap permalink wakamiya wakamiya Scopus Author ID 7007045118 7007045118 著者名 Wakamiya, Naoki
キーワード等	mMTC
	grant-free
	power-domain
	NOMA
	SIC
	channel inversion
	power collision
	per-level offered load
内容	Hirai T., Oda R., Wakamiya N.. Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC. IEEE Internet of Things Journal , (2024); https://doi.org/10.1109/JIOT.2024.3400996.
抄録	This paper proposes a scalable framework to analyze the throughput of the grant-free power-domain nonorthogonal multiple access (GF-NOMA) and presents the achievable performance in the optimized offered load at each power level (called per-level offered load) by using our framework. Our analytical model reflects packet errors caused by power collisions, characterized by GF-NOMA, based on the power level design guaranteeing the required signal-to-interference-and-noise ratio (SINR). This key idea enables analyzing the throughput of a large-scale GF-NOMA system more accurately than the existing analytical models. Also, this key idea enables optimizing the per-level offered load rather than a uniform one in typical optimization problems related to the throughput: the throughput maximization or energy minimization problem with a throughput condition. Our analytical results highlight some key insights into designing future access control methods in GF-NOMA. First, our analytical model achieves an approximation error of only 0.4% for the exact throughput obtained by the exhaustive search at five power levels; the existing analytical model provides an approximation error of 25%. Next, our proposed framework highlights that the optimal per-level offered load restrictively improves the throughput above the optimally uniform per-level offered load. Finally, our proposed framework discovers a 27 more energy-efficient per-level offered load than the existing framework at five power levels while providing higher throughput than the optimally uniform per-level offered load.
出版者	Institute of Electrical and Electronics Engineers Inc.
収録物名	IEEE Internet of Things Journal
巻(号)	11(17)
ページ	28227-28243
刊行年月	2024-05-14
言語	英語
ハンドルURL	https://hdl.handle.net/11094/97223
eISSN	23274662
関連情報 (isIdenticalTo)	DOI (出版社版) https://doi.org/10.1109/JIOT.2024.3400996
アクセス権	open access
権利情報	This article is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
出版タイプ	Version of Record
カテゴリ	学術雑誌論文 Journal Article

資源タイプ	学術雑誌論文
ローカル資源タイプ	学術雑誌論文
DCTERMS.bibliographicCitation	IEEE Internet of Things Journal. 2024, 11(17), p. 28227-28243
DC.title	Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC
DC.creator	Hirai, Takeshi
	Oda, Rei
	Wakamiya, Naoki
DC.publisher	Institute of Electrical and Electronics Engineers Inc.
DC.language' scheme='DCTERMS.RFC1766	英語
DCTERMS.issued' scheme='DCTERMS.W3CDTF	2024-05-14
DC.identifier	https://doi.org/10.1109/JIOT.2024.3400996
DC.subject	mMTC
	grant-free
	power-domain
	NOMA
	SIC
	channel inversion
	power collision
	per-level offered load
DC.description	Hirai T., Oda R., Wakamiya N.. Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC. IEEE Internet of Things Journal , (2024); https://doi.org/10.1109/JIOT.2024.3400996.
DCTERMS.abstract	This paper proposes a scalable framework to analyze the throughput of the grant-free power-domain nonorthogonal multiple access (GF-NOMA) and presents the achievable performance in the optimized offered load at each power level (called per-level offered load) by using our framework. Our analytical model reflects packet errors caused by power collisions, characterized by GF-NOMA, based on the power level design guaranteeing the required signal-to-interference-and-noise ratio (SINR). This key idea enables analyzing the throughput of a large-scale GF-NOMA system more accurately than the existing analytical models. Also, this key idea enables optimizing the per-level offered load rather than a uniform one in typical optimization problems related to the throughput: the throughput maximization or energy minimization problem with a throughput condition. Our analytical results highlight some key insights into designing future access control methods in GF-NOMA. First, our analytical model achieves an approximation error of only 0.4% for the exact throughput obtained by the exhaustive search at five power levels; the existing analytical model provides an approximation error of 25%. Next, our proposed framework highlights that the optimal per-level offered load restrictively improves the throughput above the optimally uniform per-level offered load. Finally, our proposed framework discovers a 27 more energy-efficient per-level offered load than the existing framework at five power levels while providing higher throughput than the optimally uniform per-level offered load.
DC.rights	This article is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
DC.format	97223
citation_title	Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC
citation_author	Hirai, Takeshi
	Oda, Rei
	Wakamiya, Naoki
citation_publisher	Institute of Electrical and Electronics Engineers Inc.
citation_language	英語
citation_date	2024-05-14
citation_journal_title	IEEE Internet of Things Journal
citation_volume	11
citation_issue	17
citation_firstpage	28227
citation_lastpage	28243
citation_doi	https://doi.org/10.1109/JIOT.2024.3400996
citation_public_url	https://hdl.handle.net/11094/97223

Power-Level-Design-Aware Scalable Framework for Throughput Analysis of GF-NOMA in mMTC

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