A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing

Bae, Jungnam; Radhapuram, Saichandrateja; Jo, Ikkyun et al.

Circuits and Systems, 2015, 6(5), 136-142

Number of Access:689（2025-08-14 16:32 Counts）

Identifier to cite or link to this item: https://hdl.handle.net/11094/51763

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Title
A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing
Creator
CreatorName
Bae, Jungnam
CreatorName
Radhapuram, Saichandrateja
CreatorName
Jo, Ikkyun
CreatorName
Kihara, Takao
NRID
1000080324820 1000080324820
ORCID
0000-0003-3876-2679 0000-0003-3876-2679
researchmap permalink
read0068628 read0068628
Scopus Author ID
7402741552 7402741552
CreatorName
Matsuoka, Toshimasa
Subject
VCO
Resistive Biasing
Current Source
CMOS Integrated Circuit
Phase Noise
MICS Band
Abstract
This paper presents a low-phase-noise LC voltage-controlled oscillator (LC-VCO) with top resistive biasing in subthreshold region. The subthreshold LC-VCO has low-power and low-phase-noise due to its high transconductance efficiency and low gate bias condition. The top resistive biasing has more benefit with the feature of phase noise than MOS current source since it can support the low-noise characteristics and large output swing. The LC-VCO designed in 130-nm CMOS process with 0.7-V supply voltage achieves phase noise of -116 dBc/Hz at 200 kHz offset with tuning range of 398 MHz to 408 MHz covering medical implant communication service (MICS) band.
Publisher
Scientific Research Publishing
Source Title
Circuits and Systems
Volume (Issue)
6(5)
Page
136-142
Date of Issued
2015-05-22
Language
English
Handle URL
https://hdl.handle.net/11094/51763
PISSN
21531285
eISSN
21531293
Relation.isIdenticalTo
DOI (Publisher Version)
https://doi.org/10.4236/cs.2015.65014
Access Rights
open access
CopyRight
© 2015 by authors and Scientific Research Publishing Inc. This article is licensed under a Creative Commons Attribution 4.0 International License.
oaire:version
Version of Record
Category
学術雑誌論文 Journal Article