A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier

Kihara, Takao; Park, Hae-Ju; Takobe, Isao; Yamashita, Fumiaki; Matsuoka, Toshimasa; Taniguchi, Kenji

doi:https://doi.org/10.1587/transele.e92.c.564

A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier

Kihara, Takao; Park, Hae-Ju; Takobe, Isao et al.

IEICE Transactions on Electronics, 2009, E92-C(4), 564-575

Number of Access:365（2025-08-14 07:54 Counts）

Identifier to cite or link to this item: https://hdl.handle.net/11094/51701

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Title	A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier
Creator	CreatorName Kihara, Takao
	CreatorName Park, Hae-Ju
	CreatorName Takobe, Isao
	CreatorName Yamashita, Fumiaki
	NRID 1000080324820 1000080324820 ORCID 0000-0003-3876-2679 0000-0003-3876-2679 researchmap permalink read0068628 read0068628 Scopus Author ID 7402741552 7402741552 CreatorName Matsuoka, Toshimasa
	NRID 1000020192180 1000020192180 CreatorName Taniguchi, Kenji
Subject	CMOS
	low-noise amplifier (LNA)
	low voltage
	transformer
Abstract	A 0.5 V transformer folded-cascode CMOS low-noise amplifier (LNA) is presented. The chip area of the LNA was reduced by coupling the internal inductor with the load inductor, and the effects of the magnetic coupling between these inductors were analyzed. The magnetic coupling reduces the resonance frequency of the input matching network, the peak frequency and magnitude of the gain, and the noise contributions from the common-gate stage to the LNA. A partially-coupled transformer with low magnetic coupling has a small effect on the LNA performance. The LNA with this transformer, fabricated in a 90 nm digital CMOS process, achieved an S11 of -14 dB, NF of 3.9 dB, and voltage gain of 16.8 dB at 4.7 GHz with a power consumption of 1.0 mW at a 0.5 V supply. The chip area of the proposed LNA was 25% smaller than that of the conventional folded-cascode LNA.
Publisher	電子情報通信学会
	The Institute of Electronics, Information and Communication Engineers
	デンシ　ジョウホウ　ツウシン　ガッカイ
Source Title	IEICE Transactions on Electronics
Volume (Issue)	E92-C(4)
Page	564-575
Date of Issued	2009-04
Language	English
Handle URL	https://hdl.handle.net/11094/51701
PISSN	09168516
eISSN	17451353
NCID	AA10826261
Relation.isIdenticalTo	DOI (Publisher Version) https://doi.org/10.1587/transele.e92.c.564
Access Rights	open access
CopyRight	copyright©2009 IEICE
oaire:version	Version of Record
Category	学術雑誌論文 Journal Article

Resource Type	journal article
Local Type	Journal Article
DCMI Type	Text
DCTERMS.bibliographicCitation	IEICE Transactions on Electronics. 2009, E92-C(4), p. 564-575
DC.title	A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier
DC.creator	Kihara, Takao
	Park, Hae-Ju
	Takobe, Isao
	Yamashita, Fumiaki
	Matsuoka, Toshimasa
	Taniguchi, Kenji
DC.publisher	電子情報通信学会
	The Institute of Electronics, Information and Communication Engineers
	デンシ　ジョウホウ　ツウシン　ガッカイ
DC.language' scheme='DCTERMS.RFC1766	English
DC.type' scheme='DCTERMS.DCMIType	Text
DCTERMS.issued' scheme='DCTERMS.W3CDTF	2009-04
DC.identifier	https://doi.org/10.1587/transele.e92.c.564
DC.subject	CMOS
	low-noise amplifier (LNA)
	low voltage
	transformer
DCTERMS.abstract	A 0.5 V transformer folded-cascode CMOS low-noise amplifier (LNA) is presented. The chip area of the LNA was reduced by coupling the internal inductor with the load inductor, and the effects of the magnetic coupling between these inductors were analyzed. The magnetic coupling reduces the resonance frequency of the input matching network, the peak frequency and magnitude of the gain, and the noise contributions from the common-gate stage to the LNA. A partially-coupled transformer with low magnetic coupling has a small effect on the LNA performance. The LNA with this transformer, fabricated in a 90 nm digital CMOS process, achieved an S11 of -14 dB, NF of 3.9 dB, and voltage gain of 16.8 dB at 4.7 GHz with a power consumption of 1.0 mW at a 0.5 V supply. The chip area of the proposed LNA was 25% smaller than that of the conventional folded-cascode LNA.
DC.rights	copyright©2009 IEICE
DC.format	51701
citation_title	A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier
citation_author	Kihara, Takao
	Park, Hae-Ju
	Takobe, Isao
	Yamashita, Fumiaki
	Matsuoka, Toshimasa
	Taniguchi, Kenji
citation_publisher	電子情報通信学会
citation_language	English
citation_date	2009-04
citation_journal_title	IEICE Transactions on Electronics
citation_volume	E92-C
citation_issue	4
citation_firstpage	564
citation_lastpage	575
citation_doi	https://doi.org/10.1587/transele.e92.c.564
citation_public_url	https://hdl.handle.net/11094/51701

A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier

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