DIGITAL IMPLEMENTATION OF THIRD HARMONIC DISTORTION REDUCTION IN FOURTH-ORDER ΔΣ D/A CONVERTER

Ohara, Kenji; Kamata, Takatsugu; Wang, Jun et al.

Far East Journal of Electronics and Communications, 2014, 13(2), 91-97

Number of Access:324（2025-06-30 14:44 Counts）

Identifier to cite or link to this item: https://hdl.handle.net/11094/51734

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Title
DIGITAL IMPLEMENTATION OF THIRD HARMONIC DISTORTION REDUCTION IN FOURTH-ORDER ΔΣ D/A CONVERTER
Creator
CreatorName
Ohara, Kenji
CreatorName
Kamata, Takatsugu
NRID
1000030543532 1000030543532
CreatorName
Wang, Jun
NRID
1000080324820 1000080324820
ORCID
0000-0003-3876-2679 0000-0003-3876-2679
researchmap permalink
read0068628 read0068628
Scopus Author ID
7402741552 7402741552
CreatorName
Matsuoka, Toshimasa
Abstract
This paper presents a reduction technique of third harmonic distortion (HD3) in a ΔΣ digital-to-analog converter (DAC) for low-power wireless transmitter applications. It has digital-centric circuits, such as ΔΣ modulator as well as a simple digital pre-distortion circuit for HD3 reduction. The experimental results using FPGA reveal the effectiveness of the digital pre-distortion.
Publisher
Pushpa Publishing House
Source Title
Far East Journal of Electronics and Communications
Volume (Issue)
13(2)
Page
91-97
Date of Issued
2014
Language
English
Handle URL
https://hdl.handle.net/11094/51734
PISSN
09737006
Access Rights
open access
CopyRight
© 2014 Pushpa Publishing House, Allahabad, India
oaire:version
Version of Record
Category
学術雑誌論文 Journal Article