A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION

Wang, Jun; Yasue, Kazuhiro; Matsuoka, Toshimasa et al.

Far East Journal of Electronics and Communications, 2010, 5(1), 59-65

Number of Access:365（2025-08-14 16:32 Counts）

Identifier to cite or link to this item: https://hdl.handle.net/11094/51736

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Title
A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION
Creator
NRID
1000030543532 1000030543532
CreatorName
Wang, Jun
CreatorName
Yasue, Kazuhiro
NRID
1000080324820 1000080324820
ORCID
0000-0003-3876-2679 0000-0003-3876-2679
researchmap permalink
read0068628 read0068628
Scopus Author ID
7402741552 7402741552
CreatorName
Matsuoka, Toshimasa
NRID
1000020192180 1000020192180
CreatorName
Taniguchi, Kenji
Subject
digital circuit
subthreshold region
characteristics compensation
Abstract
A performance characteristics compensation method that exhibits good resistance to process and temperature variations is proposed for ultra-low-voltage CMOS digital circuits. The experimental results show that the stability of the designed digital circuit is significantly improved even when operating in the subthreshold region under a 0.3-0.5V supply voltage.
Publisher
Pushpa Publishing House
Source Title
Far East Journal of Electronics and Communications
Volume (Issue)
5(1)
Page
59-65
Date of Issued
2010
Language
English
Handle URL
https://hdl.handle.net/11094/51736
PISSN
09737006
Access Rights
open access
CopyRight
© 2010 Pushpa Publishing House
oaire:version
Version of Record
Category
学術雑誌論文 Journal Article