A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices

Bae, Jungnam; Radhapuram, Saichandrateja; Jo, Ikkyun et al.

IEICE TRANSACTIONS on Electronics, 2016, 99-C(4), 431-439

Number of Access:967（2025-08-14 00:41 Counts）

Identifier to cite or link to this item: https://hdl.handle.net/11094/55420

Link to primary information 

File Format Terms of use Size Views Date.Available Description information
IEICE TRANSACTIONS on Electronics_99_4_431 pdf None 1.72 MB 570 2016.04.01 出版社版/publisher  

Item Information

Output File Export EndNote Basic Export Mendeley

Title
A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices
Creator
CreatorName
Bae, Jungnam
CreatorName
Radhapuram, Saichandrateja
CreatorName
Jo, Ikkyun
CreatorName
Wang, Weimin
CreatorName
Kihara, Takao
NRID
1000080324820 1000080324820
ORCID
0000-0003-3876-2679 0000-0003-3876-2679
researchmap permalink
read0068628 read0068628
Scopus Author ID
7402741552 7402741552
CreatorName
Matsuoka, Toshimasa
Subject
all-digital phase-locked loop
controller
digitally-controlled oscillator
phase interpolator
CMOS
MICS
Abstract
A low-voltage controller-based all-digital phase-locked loop (ADPLL) utilized in the medical implant communication service (MICS) frequency band was designed in this study. In the proposed design, controller-based loop topology is used to control the phase and frequency to ensure the reliable handling of the ADPLL output signal. A digitally-controlled oscillator with a delta-sigma modulator was employed to achieve high frequency resolution. The phase error was reduced by a phase selector with a 64-phase signal from the phase interpolator. Fabricated using a 130-nm CMOS process, the ADPLL has an active area of 0.64 mm^2, consumes 840 µW from a 0.7-V supply voltage, and has a settling time of 80 µs. The phase noise was measured to be -114 dBc/Hz at an offset frequency of 200 kHz.
Publisher
電子情報通信学会
The Institute of Electronics, Information and Communication Engineers
デンシ　ジョウホウ　ツウシン　ガッカイ
Source Title
IEICE TRANSACTIONS on Electronics
Volume (Issue)
99-C(4)
Page
431-439
Date of Issued
2016-04-01
Language
English
Handle URL
https://hdl.handle.net/11094/55420
PISSN
09168524
eISSN
17451353
Relation.isIdenticalTo
DOI (Publisher Version)
https://doi.org/10.1587/transele.e99.c.431
Access Rights
open access
CopyRight
Copyright © 2016 by The Institute of Electronics, Information and Communication Engineers
oaire:version
Version of Record
Category
学術雑誌論文 Journal Article