Low quiescent current LDO with FVF-based PSRR enhanced circuit for EEG recording wearable devices

Mii, Kenji; Kanemoto, Daisuke; Hirose, Tetsuya

Japanese Journal of Applied Physics, 2024, 63(3), 03SP33

Number of Access:476（2025-08-14 04:32 Counts）

Identifier to cite or link to this item: https://hdl.handle.net/11094/97767

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Title
Low quiescent current LDO with FVF-based PSRR enhanced circuit for EEG recording wearable devices
Creator
CreatorName
Mii, Kenji
NRID
1000090603332 1000090603332
researchmap permalink
dkanemoto dkanemoto
Scopus Author ID
6504308983 6504308983
ORCID
0009-0002-7564-6351 0009-0002-7564-6351
CreatorName
Kanemoto, Daisuke
NRID
1000070396315 1000070396315
researchmap permalink
hirose_tetsuya hirose_tetsuya
Scopus Author ID
9272478400 9272478400
ORCID
0000-0003-1997-5097 0000-0003-1997-5097
CreatorName
Hirose, Tetsuya
Subject
flipped voltage follower
low quiescent current
low-dropout regulator
power management
power supply rejection ratio
Description
Mii K., Kanemoto D., Hirose T.. Low quiescent current LDO with FVF-based PSRR enhanced circuit for EEG recording wearable devices. Japanese Journal of Applied Physics 63, 03SP33 (2024); https://doi.org/10.35848/1347-4065/ad1f0e.
Abstract
This paper presents a low quiescent current low-dropout regulator (LDO) with an auxiliary amplifier, flipped voltage follower (FVF)-based power supply rejection ratio enhanced circuit (FBPEC) for electroencephalogram (EEG) recording devices. The FBPEC comprises a FVF filter, current mirror, and common-source amplifier. The FBPEC exploits the characteristics of FVF filter to reduce the current consumption and increase the gain at specific frequencies. The small-signal equivalent circuit reveals the dominant pole of the FBPEC, which is affected by the output impedance and load capacitance of the common-source amplifier. The proposed LDO is designed using a 0.18 μm CMOS process and has improved power supply rejection ratio (PSRR) up to 18 dB at frequencies above 10 kHz compared to the general LDO. The proposed LDO has a low no-load quiescent current 648 nA and a good figure-of-merit score compared to those of previous works, proving that the proposed circuit is an effective solution for use in wearable EEG recording devices.
Publisher
Institute of Physics
Source Title
Japanese Journal of Applied Physics
Volume (Issue)
63(3)
Page
03SP33
Date of Issued
2024-03-01
Language
English
Handle URL
https://hdl.handle.net/11094/97767
PISSN
00214922
eISSN
13474065
Relation.isIdenticalTo
DOI (Publisher Version)
https://doi.org/10.35848/1347-4065/ad1f0e
Access Rights
open access
CopyRight
This article is licensed under a Creative Commons Attribution 4.0 International License.
oaire:version
Version of Record
Category
学術雑誌論文 Journal Article